diff --git a/Design_and_analysis.md b/Design_and_analysis.md
index 3202fa9..2107804 100644
--- a/Design_and_analysis.md
+++ b/Design_and_analysis.md
@@ -67,12 +67,15 @@ For the initial and naive software implementation, some hardware configurations
 - L1 instruction cache size: 16kB
 - L1 data cache size: 64kB
 - L2 cache size: 256kB
-- Vector length: 256
-- Element length: 64
-- Number of threads: 1
+- Vector length: 256 bits
+- Element length: 64 bits
+- Number of cores & threads: 1
 - L1 cache associativity: 2
 - L2 cache associativity: 8
 
+These are by no means optimal configurations, but to find the optimal, we need to first optimise the software implementation. 
+Making these configurations good enough as a baseline.
+
 ### Constants and definitions
 Throughout the code, several constants and definitions are defined for ease to try different configurations. These are defined in the following way:
 - `DCT_SIZE` is the size of the DCT block
@@ -135,5 +138,11 @@ void dct_2d(element_t** matrix_in, element_t** matrix_out) {
 }
 ```
 
+### Software optimisations
+## Compile time constants
+## Flattening arrays and loops
+## Vectorisation
+## Changing data types
+## Compiler optimisations